Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS

نویسندگان

  • Chris Winstead
  • Jie Dai
  • Woo Jin Kim
  • Scott Little
  • Yong-Bin Kim
  • Chris J. Myers
  • Christian Schlegel
چکیده

An all-MOS analog tail-biting MAP decoder is presented for an (8,4) Hamming code. The decoder implements a probability propagation algorithm using subthreshold CMOS networks. Physical results verify the expected behavior of the decoder and demonstrate robustness of analog decoding circuits. The authors of [l] present a class of analog VLSI circuits which can be used to implement a general probability propagation algorithm for soft-decision decoding. The proposed circuits can be implemented using either bipolar transistors or weak-inversion (subthreshold) MOS devices. Researchers have implemented analog decoders in BiCMOS [2][3]. MOS transistors scale to smaller sizes than bipolar, and they may be fabricated using more common digital processes. The analog Hamming decoder was fabricated in an AMI .5pm digital process, and verifies that analog decoding can be performed using only MOS devices. Simulation and performance verification for large analog decoder networks cannot be carried out using SPICE. An intermediate model has been produced using VHDL which accounts for the physical behavior of the analog cells. This model allows prediction of the behavior of analog networks, and is used to produce the performance curves of Fig. 1. Measured output of the decoder circuit is shown in Fig. 2. The results of Fig. 2 are obtained by switching between two input patterns at 2MHz. The decoder uses 3.8 mW of power, most of which is thought to be consumed in the interfaces. BiCMOS analog decoders are expected to be faster because MOS circuits are limited to weak-inversion (device currents below -100nA). Devices whose currents exceed this range are said to operate in strong inversion, and the assumptions made in [l] are no longer valid. The Hamming decoder nonetheless continues to function in strong inversion. Allowing device currents on the order of lOpA, decoding is possible up to 5 MHz (20 Mbit/s). For analog circuits, higher device currents generally provide faster operation. Analog decoders are expected to degrade gracefully in response to other non-ideal circumstances such as mismatch, device noise, and process variation. Much of this flexibility arises from the parallelism inherent in the probability propagation algorithm. The Hamming decoder provides an exceptional example of robustness in that it functions in spite of a layout error. Fig. 1 compares performance of an optimal MAP decoder, the analog decoder with layout error, and a corrected analog decoder. ‘This work was supported by NSF grant CCR-9971168. 2EE Dept, 50 S. Central Campus Dr, Rm 3280 MEB, Salt Lake 3ECE Dept, 309 Dana Research Center, 360 Huntington Avenue, City, U T 84112-9206 Boston, MA 02115 Yon€;-Bin Kim, Woo Jin Kim Northeastern University3 e-mail: ybkQece . neu. edu

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تاریخ انتشار 2001